System Overview

The EA-AMP-SUB-1D-500R is not a single-chip amplifier. Crack it open and you find two processors splitting the work along a clean boundary: an NXP LPC2103F ARM7 microcontroller running the system — display, encoder, IR, serial — and a D2Audio D2-81431 Class D SoC handling everything that touches audio. The two communicate over I2C at 480 kHz, and the LPC2103F holds authority over the D2-81431’s boot sequence through dedicated reset and mode-select pins. The firmware analysis decoded all 121 functions in the LPC2103F’s 32 KB flash, confirming every detail of this architecture.

graph TD
    USB["Mini USB"] --> CP2104["CP2104<br/>USB-to-UART"]
    CP2104 --> LPC["NXP LPC2103F<br/>ARM7 System Controller"]
    IR["IR / 12V Trigger"] --> LPC
    LPC --> VFD["VFD Display / Encoder"]
    LPC -- "I2C control<br/>(addr 0xB2)" --> D2["D2Audio D2-81431<br/>Class D DSP SoC"]
    LPC -- "boot mode pins<br/>IRQ[D:A] + nRESET" --> D2
    RCA["Audio RCA In"] --> ADC["ADC"] --> D2
    D2 --> PWM["PWM Stage"] --> FET["MOSFETs"] --> SPK["Speaker Out"]
    D2 -- "GPIO6/7<br/>dedicated I2C" --> EEPROM["Atmel U6<br/>I2C EEPROM"]

A Silicon Labs CP2104 USB-to-UART bridge sits between the mini USB connector on the rear panel and the LPC2103F’s UART0 port. The CP2104 enumerates as a standard serial device (VID 10C4, PID EA60) and draws bus power, so it appears on the host machine even when the amplifier has no AC power applied. This is the only digital interface the outside world has to the system — there is no Ethernet, no Wi-Fi, no RS-232. Everything flows through this single UART. The firmware analysis confirmed that UART0 is TX-only at 9600 baud — the MCU sends a boot message and never reads the serial port again.

The LPC2103F is the system controller in the fullest sense. Its firmware (V1.19, running at 58.98 MHz CCLK from a 14.7456 MHz crystal × PLL) drives the vacuum fluorescent display via 4-bit parallel GPIO, reads the rotary encoder and front-panel button, decodes NEC-protocol IR commands from the 3.5mm jack via Timer1 capture, monitors the 12V trigger input, and manages the entire menu system — crossover frequency, phase, EQ presets, night mode, power control behavior. The main loop runs a 100 Hz tick-driven poll architecture, feeding the watchdog, debouncing inputs, dispatching IR commands, and auto-saving settings to EEPROM on every pass. When a user changes a parameter, the LPC2103F translates that into one or more I2C writes to the D2-81431 at address 0xB2, always wrapping DSP coefficient changes in a mute-configure-unmute sequence to prevent audible artifacts.

The D2-81431 is the audio engine. It contains a four-channel DSP core with integrated PWM controller, sample-rate conversion, multi-band EQ, crossover filters, dynamic compression, power limiting, and an adaptive digital feedback loop that monitors the actual PWM output and speaker current to correct distortion in real time. It is a serious piece of silicon — four full channels of processing at better than 110 dB SNR. Episode uses exactly one of those channels for the subwoofer output. The remaining processing headroom explains why this “simple” sub amp offers eight-step phase adjustment, multiple crossover slopes, and a library of speaker-specific EQ presets that grew from four profiles to sixteen in the 2024 revision. The silicon was always capable; Episode just kept enabling more of it.

The D2-81431 has no internal firmware storage whatsoever. Every boot, it loads its entire program — DSP coefficients, filter topologies, protection parameters, all of it — from an external Atmel I2C EEPROM designated U6 on the board. This EEPROM connects to the D2-81431 through a dedicated I2C bus on GPIO6 and GPIO7, completely separate from the control I2C bus the LPC2103F uses for runtime parameter writes. This separation is architectural: the NVM bus is the D2-81431’s private path to its own firmware, while the control bus is the LPC2103F’s interface for sending volume changes, EQ updates, and mode selections during normal operation.

The result is a system where the LPC2103F acts as gatekeeper for everything — user input, serial communication, boot sequencing, and firmware updates for both itself and the D2-81431. Understanding this dual-processor split is essential to making sense of the firmware update mechanism, which involves two completely separate images written through two completely separate procedures.