Firmware Update Mechanism

Renesas application note R32AN0006, “Writing to EEPROM or SPI Flash Memories Using an External Microcontroller,” describes the procedure for updating firmware on the D2-1 family of Class D controller SoCs. The D2-81431 has no internal non-volatile memory — it boots entirely from an external Atmel I2C EEPROM (designated U6 on this board, an AT24Cxx series part, likely AT24C256 at 32 KB or AT24C512 at 64 KB). The app note lays out the exact I2C transaction sequence an external microcontroller must perform to rewrite that EEPROM. In this amplifier, the external microcontroller is the NXP LPC2103F.

Normal Boot: OPERATE Mode

During normal power-on, the LPC2103F sets the D2-81431’s IRQ[D:A] pins to 0001, selecting the “self-boot from I2C EEPROM” mode. It then deasserts nRESET, and the D2-81431 takes over from there — reading its entire firmware image, DSP coefficient tables, filter configurations, and protection parameters from the Atmel EEPROM through its dedicated NVM I2C bus on GPIO6 and GPIO7. Once booted, the LPC2103F communicates runtime parameter changes (volume, EQ, crossover) via the separate control I2C bus at address 0xB2. This is the steady-state architecture: the D2-81431 runs autonomously from its EEPROM image, and the LPC2103F sends adjustments as the user interacts with the menu.

Firmware Update: UPDATE Mode

The update procedure, reconstructed from R32AN0006, proceeds in a carefully sequenced set of steps. The LPC2103F begins by setting IRQ[D:A] to 0000, which selects “I2C slave boot from host controller” mode instead of the normal EEPROM self-boot. It then asserts nRESET, holds it briefly, and deasserts it. After a 200 ms wait for the D2-81431’s internal initialization to complete, the LPC2103F writes a bootloader image — a small hex file — to the D2-81431 at I2C address 0x88. This loads a temporary bootloader program into the D2-81431’s internal RAM. The bootloader is not the final firmware; it is a utility whose sole purpose is to act as a bridge between the I2C control bus and the EEPROM.

With the bootloader running in RAM, the LPC2103F then writes the full firmware image to the D2-81431 at I2C address 0xB2. The bootloader in RAM receives this data and writes it through to the Atmel EEPROM on GPIO6/GPIO7. After another 200 ms wait for the EEPROM write cycle to complete, the LPC2103F asserts nRESET again and sets IRQ[D:A] back to 0001, commanding the D2-81431 to boot from the freshly written EEPROM image. If the write succeeded, the D2-81431 comes up running new firmware.

The elegance of this scheme is that the D2-81431 never directly participates in its own update — it is either a passive I2C slave accepting data from the LPC2103F, or it is running the temporary bootloader that acts as a write proxy to the EEPROM. The LPC2103F orchestrates the entire sequence.

Two Images, One USB Port

This architecture means a complete firmware update involves two separate binary images delivered through two separate mechanisms, both funneled through the single USB serial connection.

The first image is the LPC2103F’s own MCU firmware. This gets written to the LPC2103F’s 32 KB on-chip flash through the ARM ISP bootloader protocol on UART0. The UPDATE switch on the rear panel almost certainly activates ISP mode by pulling P0.14 low during reset, causing the LPC2103F to enter its factory bootloader instead of running application code.

The second image is the D2Audio DSP firmware destined for the EEPROM. This image cannot be written directly to the EEPROM from the outside — it must flow through the LPC2103F, which performs the boot-mode manipulation and I2C transaction sequence described above. The LPC2103F application firmware contains the update logic for the D2-81431; it receives the DSP image over UART, then drives the I2C update procedure itself.

The dealer update tool — whatever proprietary software Episode provides to its Control4 installers — likely automates both steps: flash the MCU, then command the newly flashed MCU to write the DSP image to EEPROM. The firmware images themselves are generated with D2Audio’s “Audio Canvas” OEM tool, a Windows application that was distributed only to licensed customers of D2Audio (later Intersil, now Renesas). There is no public source for these images, no download on the SnapAV support portal, and no documentation of the serial protocol the dealer tool speaks. The update capability was built into the hardware from day one — the USB port and UPDATE switch have been on the rear panel since 2015 — but Episode kept the tooling strictly within the dealer channel.